At Tier IV, we build self-driving solutions for many operational domains covering a broad range of applications. Building on widely-used open-source software, we provide both the foundational self-driving technology as well as the integration and customization necessary to provide complete self-driving applications.
As an Autonomous Driving - Senior RTL Design Engineer (FPGA, ASIC), you will be responsible for optimizing our self-driving hardware and software especially from the viewpoint of hardware-friendly software. You will also make constructive discussions in the worldwide community to minimize complexity, cost, and power, and optimize performance, capability, and scalability of the Intelligent ECU.
・Specify, architect, and design hardware accelerators that process system compute workloads.
・Perform power, area and performance trade-off analyses from the viewpoint of the computer system.
・Create and run software that tests the designs.
・Evaluate cutting-edge IPs and ECUs of autonomous vehicles.